Explanation of the DRC (Design Rule Check) Violation for Each Process
This page lists the issues that may arise when using DRC command files provided by the process foundry for each process. In response to the increasingly stringent requirements for Design Rules Check (DRC) from process foundries, we kindly ask users to cooperate with the TSRI to help improve the yield of chip fabrication.
Users are kindly requested that if there is a need to violate any Design Rule due to design considerations or limitations, including DRC issues caused by insufficient metal density due to the use of inductors or other design, please contact the responsible engineer for each process before the application deadline and send the "Application Form for DRC Violation in Chip Fabrication" to the responsible engineer via email. Please provide detailed explanations in this application form and the design content document, including the specific DRC items that need to be violated, the reasons for violating those DRC items, and layout screenshots for reference. The process engineer at the TSRI will contact the process foundry to assist in confirming whether the requested DRC violations can be accepted.
Please pay special attention to the following：
- Failure to submit the "Application Form for DRC Violation in Chip Fabrication" or not specifying special requirements in the design content document that lead to DRC errors will be considered as a violation of DRC rules, affecting tape-out privileges.
- Not every request for DRC error exceptions will be accepted by the wafer foundry. Please assess the risk of cases not being accepted by the foundry, leading to non-acceptance and fabrication by TSRI.
| No. | Process Technology | File Download |
|---|---|---|
| 1 | D35, TSMC 0.35 um Mixed-Signal 2P4M Polycide 3.3/5V | Download |
| 2 | T18, TSMC 0.18 um CMOS Mixed Signal RF General Purpose Standard Process FSG Al 1P6M 1.8&3.3V | Download |
| 3 | T25HVG2, TSMC 0.25UM CMOS HIGH VOLTAGE MIXED SIGNAL GENERAL PURPOSE IIA BASED BCD 1P5M SALICIDE NBL EPI AL USG 2.5/5/7/12/20/24/40/45/60V, VG2.5/5/12V | Download |
| 4 | U18, UMC 0.18um Mixed-Mode and RFCMOS 1.8V/3.3V 1P6M Metal Metal Capacitor Process | Download |
| 5 | TN90GUTM, TSMC 90NM CMOS Mixed Signal RF General Purpose | Download |
| 6 | T18HVG2, TSMC 0.18UM CMOS HIGH VOLTAGE MIXED SIGNAL BASED GENERATION II BCD 1P6M SALICIDE AL_FSG 1.8/5/6/7/8/12/16/20/24/29/36/45/55/65/70V/VG1.8/5V AND 5/6/7/8/12/16/20/24/29/36/45/55/65/70V/VG5V | Download |
| 7 | TN40G, TSMC 45 nm CMOS LOGIC General Purpose Superb (40G) ELK Cu 1P10M 0.9/2.5V | Download |
| 8 | TN65GP, TSMC 65 nm CMOS Mixed Signal RF General Purpose Plus LowK Cu 1P9M 1.0&2.5V | Download |
Download