Home Chip ImplementationChip ImplementationTape-out Application
Print(Open New Window) facebook(Open New Window)

Tape-out Application

Tape-out New Application

Types of Chips

  • Advanced Chip (including Partial-price, new Faculty Discount, Superior Chip Discount chips)
  • Educational Chip
  • Full-price Chip

Tape-out Schedule


Application Procedures (Please refer to the following chart for instructions according to the type of chip you want to apply for)

Log in to Membership > Submit Relevant Information before Application > Process/Semiconductor Intellectual Property Application > Tape-out Application.
Item Advanced Chip (including Partial-price, new Faculty Discount, Superior Chip Discount chips) Educational Chip Full-price Chip
Qualifications Professors of domestic colleges and universities or their guided students Students of IC design courses in domestic academic colleges and universities Teachers of domestic academic institutions (tertiary institutions)
Guidelines Advanced Chip Application Guidelines Educational Chip Application Guidelines Full-price Chip Application Guidelines
Document
*required		 Intellectual Property Rights Affidavit＊ (format.pdf)
New Faculty Qualifications Inquiry Letter (format.excel)
Email to cisd_prouser@narlabs.org.tw		 -
Process Permission Please Complete Applications for Process/Semiconductor IP Core Permission first
Tape-out Application
For advanced chips/educational chips, please complete the application before 14:00 on the application deadline; overdue applications will not be accepted.
Quick-review Partial-price chips and Full-price chips should be completed before 23:59 on the application deadline.
Files to Upload
  1. Design Content Electronic File Example (File format restriction*.doc)
  2. GDS File
  3. DRC Verification Result File Example
  4. LVS Verification Result File Example
  5. Tapeout Review Form
  1. Design Content Electronic File Example (File format restriction*.doc)
  2. GDS File
  3. DRC Verification Result File Example
  4. LVS Verification Result File Example
  5. Tapeout Review Form
  1. Design Content Electronic File Example(GDS file or wire bonding diagram required))
  2. GDS File
  3. DRC Verification Result File Example (PP15, GaN25, and other WIN processes are not required to be submitted.)
  4. Tape-out Review Form (Only Cell-Based designs need to be uploaded.)
Note 1: Documents should be in MS Word format.
Note 2: The filename for Tape-out Review Form upload must be TRF.doc
Note 3: The wire bonding diagrams of advanced chips and educational chips are included in the "Design Content Electronic File" and do not need to be submitted separately. If packaging is not required, no wire bonding diagram is necessary.
Note 4: The application form for DRC violation is needed for chip manufacturing. Please submit it before each MPW Runschedule deadline as it requires submission to the wafer manufacturer for review, and it is limited to one submission to avoid the time-consuming process of going back and forth.
Chip Review Advanced Chip Application and Review Procedures Educational Chip Application and Review Procedures -
Tape-out Approval • The system sends the order to the professor. Please confirm the wafer area and cost before signing the order of chip manufacturing.
Test Report Please complete the chip test within two months after receiving the chip, and upload the electronic file of the test report and abstract in Chinese and English. -
Contact For questions about application or technical consultation, please refer to Contact of each Process. Ms. Hs, ext.7123
fanglin@narlabs.org.tw
Other Forms Tape-out Application Website Instructions and Notes
Sample of Slides for Review Meeting Reports
Chip Arrangements and Precautions
Application Form for DRC Violation in Chip Manufacturing		 Terms and Conditions for Full-price Chip Fabrication
Full-price Chip Fabrication Wafer Cutting Numbering Chart
Instructions for Changing Full-price Chip Service Applications
Declaration of Legal Use of Process Data for Chip Fabrication


Important Things to Note

  1. The applicant's professor must have valid process permission (educational chip: the professor must have valid process permission); the applicant must have the professor's approval to use the process permission.
  2. Full-price chip applicants must have valid process permission, or issue a statement on the legal use of process data.
  3. The Class Roaster must be provided by the professor in advance, and the students in the list are requested to apply for educational chips within the valid application period.
  4. Discount for new professors: Please provide proof of discount for new professors in advance so that applicants can apply for this type of chip; please note: a certain quota and number of this kind of chips after approval can be free of charge. The excess amount is NOT applicable for a new case.
  5. Superior chip discount: This type of chip information is organized and archived by TSRI, and professors/students can apply for this type of chip only after the data is entered into the system. Please note: a certain quota and number of this type of chip is free of charge and inspection. If the number or quota has been exceeded, no new application can be made.
  6. Test Report：
    • Regardless of the type of chip, if the applicant accumulates one or more overdue test reports, he or she cannot apply for a new case.
    • Advanced Chip (including Partial-price, advanced Quick-review Partial-price, new professor discount, superior chip discount): If the professor and their students accumulate more than three overdue test reports of this type of chip, the professor and students under their name are not allowed to apply for new cases.
    • Educational chip: If the professor and their students have accumulated more than six overdue test reports of this type of chip, neither the professor nor their students can apply for a new case.
    • After the test report is uploaded, the submission status will be displayed as "Uploaded" and then a new case can be proceeded.